[git commit] libbb/sha1: shrink x86 hardware accelerated hashing (32-bit)

[Denys Vlasenko]

commit: https://git.busybox.net/busybox/commit/?id=eb8d5f3b8f3c91f3ed82a52b4ce52a154c146ede
branch: https://git.busybox.net/busybox/commit/?id=refs/heads/master

function                                             old     new   delta
sha1_process_block64_shaNI                           511     507      -4

Signed-off-by: Denys Vlasenko <vda.linux at googlemail.com>
---
 libbb/hash_md5_sha_x86-32_shaNI.S | 9 ++++-----
 libbb/hash_md5_sha_x86-64_shaNI.S | 3 +--
 2 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/libbb/hash_md5_sha_x86-32_shaNI.S b/libbb/hash_md5_sha_x86-32_shaNI.S
index ad814a21b..a61b3cbed 100644
--- a/libbb/hash_md5_sha_x86-32_shaNI.S
+++ b/libbb/hash_md5_sha_x86-32_shaNI.S
@@ -53,8 +53,8 @@ sha1_process_block64_shaNI:
 	pshufb		%xmm7, MSG3
 
 	/* Save hash values for addition after rounds */
-	movu128		E0, %xmm7
-	/*movu128	ABCD, %xmm8 - NOPE, 32bit has no xmm8 */
+	mova128		E0, %xmm7
+	/*mova128	ABCD, %xmm8 - NOPE, 32bit has no xmm8 */
 
 	/* Rounds 0-3 */
 		paddd		MSG0, E0
@@ -207,12 +207,11 @@ sha1_process_block64_shaNI:
 	/* Add current hash values with previously saved */
 	sha1nexte	%xmm7, E0
 	/*paddd		%xmm8, ABCD - 32-bit mode has no xmm8 */
-	movu128		76(%eax), %xmm7		# recreate original ABCD
-	shuf128_32	$0x1B, %xmm7, %xmm7	#  DCBA -> ABCD
-	paddd		%xmm7, ABCD
+	movu128		76(%eax), %xmm7	# get original ABCD (not shuffled)...
 
 	/* Write hash values back in the correct order */
 	shuf128_32	$0x1B, ABCD, ABCD
+	paddd		%xmm7, ABCD	# ...add it to final ABCD
 	movu128		ABCD, 76(%eax)
 	extr128_32	$3, E0, 76+4*4(%eax)
 
diff --git a/libbb/hash_md5_sha_x86-64_shaNI.S b/libbb/hash_md5_sha_x86-64_shaNI.S
index fc2ca92e8..b32029360 100644
--- a/libbb/hash_md5_sha_x86-64_shaNI.S
+++ b/libbb/hash_md5_sha_x86-64_shaNI.S
@@ -36,9 +36,8 @@
 	.balign	8	# allow decoders to fetch at least 2 first insns
 sha1_process_block64_shaNI:
 	/* load initial hash values */
-
-	xor128		E0, E0
 	movu128		80(%rdi), ABCD
+	xor128		E0, E0
 	pinsrd		$3, 80+4*4(%rdi), E0	# load to uppermost 32-bit word
 	shuf128_32	$0x1B, ABCD, ABCD	# DCBA -> ABCD