handling "multi-part" source files

[Rob Landley]

On Wednesday 10 May 2006 4:03 pm, Robert P. J. Day wrote:
>   a sample makefile you can drop into libbb and just run with
>
> $ make -f <filename> allobjs
>
> to see how it would handle compiling multi-part source files.
>
> rday
>
> =============== cut here ===============B
> #
> #  Macro to extract the "subparts" of a given multi-part source file.
> #
>
> get-file-subparts = $(shell grep -h "^\#ifdef L_" ${1} | sed -e "s/^\#ifdef
> L_//")

You don't need grep then sed, you should be able to just go:

$(shell sed -n -e 's/^#ifdef L_//p')

>
> MULTISRCS := $(shell grep -l "^\#ifdef L_" $(wildcard *.c))
> MULTISUBPARTS := $(foreach msrc,${MULTISRCS},$(call \
>      get-file-subparts,${msrc})) 
> MULTIOBJS := $(addsuffix .o,${MULTISUBPARTS}) 

I'm a bit confused how you're correlating what part comes from which file 
here.  Is there some kind of nested array syntax I'm missing?  MULTISUBPARTS 
is just a big flat list after the foreach, right?

> #
> #  For a given source file, generate the corresponding object files.
> #
>
> gen-objs = $(addsuffix .o, \
> 	$(shell grep -h "^\#ifdef L_" ${1} | sed -e "s/^\#ifdef L_//"))

Why are you reproducing get-file-subparts here?  Can't you call it again?

> #
> #  Define the rule that rebuilds a set of object files from a
> # multi-part source file.
> #
>
> define objrule
> $(call gen-objs, ${1}): ${1}
> 	@echo CC $$< -DL_$$* -o $$@	# replace with real command
> endef
>
> $(foreach src,${MULTISRCS},$(eval $(call objrule,${src})))
>
> .PHONY: allobjs
> allobjs: ${MULTIOBJS}

Ok, lemme see if I understand this:

MULTISRCS := grep "^#ifdef L_" *.c
MULTIOBJS := for i in $MULTISRCS: (sed -n -e 's/^#ifdef L_//p' $i) + ".o"

I'm still confused about the objrule bit, since the foreach that calls it 
isn't a target of allobjs...

Looks like a promising start.  If some of that goes in Rules.mak and the 
appropriate logic to call it goes into the right places.  Of course that 
hand-waves over about half the work... :)

If we have a .c file, figuring out how to build it is easy.  If we need a .o 
file, figuring out where it lives is somewhat harder.  Possibly this properly 
belongs in the dependency generation step?  Or is there an easy way in 
makefilese to create a list of .c files, each with a list of .o files they 
can create, and given a .o file find the corresponding .c file for it without 
running grep *.c more than once per directory during a build?

Rob
-- 
Never bet against the cheap plastic solution.